Problem #2. All of the NMOS have kn,= 0.1 mA/V, Vt= 0.9V, λ = negligible, and…

Problem #2. All of the NMOS have kn,= 0.1 mA/V, Vt= 0.9V, λ = negligible, and L = 1μm. The widths are W3-W4-20μm, and W’s 100um. You will need to design the widths W, W2 and W6. 3K 3K 8. 1K 06 01 02H1 UOUT Vin- 03 04 Q5 -5U (a) Assuming all transistors in saturation and Vint- Vin-, find all the drain currents ID1 through ID6